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On-Demand Webinar

RISC-V: Ready for Prime time?

Session 1: State of Open Source for RISC-V Hardware

RISC-V, the open-standard instruction set architecture, is rapidly challenging traditional x86 and ARM-based architectures. Its modularity, flexibility, and royalty-free nature make it a compelling choice across industries. Amidst the competition among key players like SiFive, Ventana Microsystems, and Andres Technologies, let's revisit the open-source promise of RISC-V.

Gain valuable insights into the evolution of open-source RISC-V processor IP with industry expert Dr. Tauseef Rab in this on-demand webinar. Learn how the groundbreaking SweRV cores, developed at Western Digital, have paved the way for broader adoption and are driving innovation across industries. Watch anytime and explore the future of RISC-V.

Key Topics

  • Open-Source RISC-V Cores: Discover the available cores, their capabilities, and potential applications.

  • Verification Quality: Understand the readiness of open-source RISC-V cores for real-world applications.

  • Beyond Academia: Explore real-world use cases for open-source RISC-V cores.

  • Comparing with Proprietary Cores: Evaluate the advantages and limitations of open-source versus proprietary cores.

  • Challenges and Considerations: Learn about potential hurdles and best practices for teams adopting open-source RISC-V cores.

  • The future of RISC-V: Examine RISC-V's potential to extend beyond embedded cores into mainstream computing devices.

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Featured Speakers

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Dr. Tauseef Rab

Senior Director Of Engineering, CPU & Technical Lead - Luminous Computing

Tauseef has been working on commercial RISC-V CPUs since 2017 when RISC-V started to gain traction outside of academia. He was part of the small team at Western Digital that created and then open-sourced the SweRV family of RISC-V-based embedded cores. He has worked at SiFive and, most recently, at Luminous Computing where he is the Technical Lead for the RISC-V CPU for AI. Tauseef holds a PhD in Computer Engineering from the University of Texas at Austin, where he currently serves as an adjunct faculty member as well.

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Faisal Haque

Founder and CEO - Imparé

Faisal Haque, founder of Imparé, boasts 30+ years of experience at tech giants like Intel, Cisco, and Qualcomm. He co-chaired the SystemVerilog sub-committee, authored three design and verification books, and contributed to over 10 high-profile products, including the record-breaking Cisco CRS-1 router. Faisal's leadership and expertise drive Imparé's success, evident in 15+ chip tape-outs and numerous industry articles.