This session covers the importance of cross-platform verification, the influence of open-source collaboration and MMU's adaptability to different application domains.
With over 4 years in RISC-V core design and verification, Fatima specializes in RISC-V vector processors. She played a key role in verifying SiFive's U74 RISC-V high-performance Linux-capable core, focusing on the cache subsystem. Fatima is an active contributor to the OpenHW CVA6 core, leading projects such as adding RISC-V extensions, CVA6 MMU verification, and integrating CVA6 with a RISC-V vector coprocessor.
Basit Mehmood, Associate Verification Engineer at Impare, is a significant contributor to the RISC-V ecosystem. He played a key role in verifying the RISC-V debug module in OpenTitan, demonstrating expertise in addressing cutting-edge verification challenges. Basit's hands-on experience and contributions position him as a valuable asset for gaining insights into the complexities of RISC-V verification.
Bilal Zafar, co-founder & CEO of 10xEngineers, specializes in design & verification services for RISC-V and Image processors. Formerly a Principal Engineer at Qualcomm, he co-led a global team developing custom & semi-custom IPs. Dr. Zafar holds an MS and PhD in Computer Engineering from the University of Southern California, Los Angeles.